gtpm2m39 | Migration Guide: Program Update Tapes |
The following section discusses the migration considerations for 32-way loosely coupled processor support.
See the APEDIT for APAR PJ27785 for information about prerequisite APARs.
32-way loosely coupled processor support provides the additional capacity needed to support application workload growth by allowing as many as 32 processors in a loosely coupled complex. The functions necessary to provide this capability have been implemented over several program update tape (PUT) releases. This release provides the functions necessary to make this support a reality.
The following functional areas and constraints are addressed:
MPIF allows cooperative processing between TPF systems and currently uses two fixed record types (#CB8HD and #PDREC) that have been modified and enhanced as follows:
The ZMPIF PDR command with the INIT parameter specified has been modified to initialize PDR records for the processor on which it is entered and to only initialize those records that have not already been initialized. An additional optional subparameter (ALL) has been added to the INIT parameter that causes PDR records for all processors to be initialized.
The INETD uses the Internet daemon configuration file (IDCF) to hold configuration information. The IDCF has been expanded to support additional processors by moving the information from the #IBMM4 fixed file record type to its own fixed file record type (#IDCF1).
TCP/IP offload support uses processor shared #IBMM4 fixed file records to store the CLAW device table (CDT) and the TCP/IP configuration table (ITCPC). Both the CDT and the ITCPC have been moved to the processor unique #IBMMP4 fixed file record type to support additional processors.
The processor field in the RCIT record has been expanded to support 32 processors.
Reserved bytes in each NCB entry have been used to create a new processor mask that supports 32 processors.
All processor mask fields have been expanded to support 32 processors.
The subsystem state table contained in CTKI has been moved to its own fixed file record type, #CN1ST, with 64 ordinals. This allows expansion to 32 processors.
CTKC maintains a table of terminals used in the TPF complex. The table has been expanded to allow additional entries for functional support consoles and alternate consoles to be defined for 32 processors.
The super GOA records currently support as many as 12 processors with each processor running as many as 16 I-streams. 32-way loosely coupled processor support increases the super GOA support to as many as 32 processors with 16 I-streams each.
To support 32-way loosely coupled processors, general file and GDS control structures have been moved from processor shared fixed file records to processor unique fixed file records. General file moved from the #IBMM4 record type to the #IBMMP4 record type, and GDS moved from the #DSCRI record type to the #DSCRU record type.
Commit and rollback have been extended by increasing the number of #IBMM4 fixed file records for the control table (CRTB) checkpoint area and by increasing the number of log fixed file records to 32 (#RLOG1 - #RLOG32).
IPC has been changed from using 8-bit masks for representing destination processors to using lists of processors, and by extending the list support implemented for the internal event facility (IEF) to support IPC. The following application interfaces and functions have been modified for list support:
See TPF General Macros, TPF System Macros, and the TPF C/C++ Language Support User's Guide for more information about the IPC and list macros and functions.
Keypoint accessing has been extended for 32 processors as follows:
The ZKPTR command has been added to allow the keypoint pointer record to be updated during system restart.
To support 32-way loosely coupled processors, the number of FC33 records has been increased and the @@32BUSED field was defined. In addition, #SONRPE processor unique fixed file records have been replaced with #SONRPE0 - #SONRPE7 processor shared fixed file records.
To ease migration to 32-way loosely coupled processors, processors running with 32-way loosely coupled processor support and processors running at a back-level of support can coexist in the same loosely coupled complex. When operating in coexistence mode, you must observe the following restrictions:
See Migration and Fallback for more information about migrating applications.
Any recoup run must include only processors that have 32-way loosely coupled processor support installed or include only processors that do not have 32-way loosely coupled processor support installed. A recoup run may not include processors at both PUT levels.
Any updates made to back-level processors are not recognized on processors with 32-way loosely coupled processor support and must be entered again when 32-way loosely coupled processor support is installed on the processor.
Any updates made on a processor with 32-way loosely coupled processor support are not recognized by a back-level processor and would be lost on the processor if you fall back to the previous level of support. The updates would be restored automatically when the processor is migrated to 32-way loosely coupled processor support again.
If you use the ZINET ADD or ZINET ALTER commands on a back-level processor, you must enter the command again when 32-way loosely coupled processor support is installed on that processor.
If you use the ZINET ADD or ZINET ALTER commands on a processor with 32-way loosely coupled processor support, the data is not available to back-level processors.
If you fall back to the back-level support, any data entered is lost while operating at the back-level. The data is automatically restored when you again migrate to 32-way loosely coupled processor support.
When migrating to 32-way loosely coupled processor support, you must observe the following considerations and restrictions:
To complete clock restart, every processor IPLed after the first must be able to communicate with at least one of the first eight processors. If a processor with a CPU ordinal below 8 is re-IPLed, it must be able to find another active processor with an ordinal of 0 - 7. That is why at least two active processors (rather than just one) must have CPU ordinals in the range 0 to 7. If none of the first eight processors are active, a processor being IPLed will wait indefinitely in restart for clock confirmation. If this occurs, you must re-IPL two of the first 8 processors.
IPC applications should also be analyzed to identify changes to the following:
See TPF General Macros for more information about the GENLC macro and see TPF System Macros for more information about the SIPCC macro.
After making any modifications or updates to your applications, the applications must be assembled or compiled on a TPF 4.1 system with 32-way loosely coupled processor support installed.
For all super GOA records where GO2DSP is used, the GO1CHN field must be coded with the value X'40'. This GO1CHN value informs the online system that the super GOA records are coded using the GO2 labels.
Once the pilot tape load deck is edited, use the system test compiler (STC) to create a PILOTA tape and use the ZSLDR command to load the tape to the system.
See TPF System Installation Support Reference for more information about globals, super GOAs, and the PILOTA load deck and tape. See TPF Operations for more information about the ZSLDR command.
After you have migrated to 32-way loosely coupled processor support, but have not yet added a ninth processor to the loosely coupled complex, you can fall back to a TPF 4.1 system image without 32-way loosely coupled processor support on one or more processors in the complex. If you do, be aware of the following:
See Falling Back from 32-Way Loosely Coupled Processor Support for more information about the steps required for falling back.
A number of functions and data structures were modified and enhanced to support 32-way loosely coupled processors. The following describes the design considerations for these changes.
A number of fields and data structures that are used throughout the TPF 4.1 system are limited to an 8-way loosely coupled processor complex. Many of these fields and structures use 1-byte bit masks to represent the processors in the complex. The following describes the changes to the data structures and fixed file record formats to support 32-way loosely coupled processors:
To ease migration, record type #HDREC has been created to support the increased data size and number of records. The hardware definitions are copied to the new record type the first time a processor with 32-way loosely coupled processor support is IPLed.
In coexistence mode, processors running a back-level TPF 4.1 system continue to access the old records. Once migration is completed and there is no requirement to run a back-level processor, the #CB8HD records are removed from the TPF 4.1 system.
Because most of the data is processor unique and to ease migration, the processor unique information has been moved to a new record type, #PDREU. The processor shared information remains in ordinals 0 and 1 of the #PDREC records. When an existing processor is IPLed for the first time with 32-way loosely coupled processor support, the processor unique data for that processor is migrated from the #PDREC record type to the #PDREU record type. When a new processor is added to the loosely coupled complex, the operator is prompted to enter the ZMPIF PDR INIT command during TPF 4.1 system restart. This command will initialize the #PDREU data for the new processor.
In coexistence mode, processors running a back-level TPF 4.1 system continue to access the old records. Once migration is completed, #PDREC ordinals 2 and 3 are used for future expansion of processor shared information and ordinals 4 and higher should be removed from the TPF 4.1 system.
The first time a ZINET command is entered that accesses the #IDCF1 record type, the data is moved from the old records to the new record type. Subsequently, any processor that is IPLed with 32-way loosely coupled processor support will access the new IDCF record type.
In coexistence mode, processors running a back-level TPF 4.1 system continue to access the old records. Once migration is completed, the #IBMM4 records that contain the old IDCF information can be set to zero to avoid future error conversions.
If CLAW support and TCP/IP support are defined in the TPF 4.1 system, the CDT and ITCPC records are moved to the #IBMMP4 records the first time an existing processor is IPLed with 32-way loosely coupled processor support. For a new processor being added to the loosely coupled complex, the CDT and ITCPC records are initialized the first time the TPF 4.1 system is IPLed.
In coexistence mode, processors running a TPF 4.1 system without 32-way loosely coupled processor support continue to access the CDT and ITCPC in the #IBMM4 records.
CTKI currently maintains a table of cycle indicators called a subsystem state table (SST) at tag IC0SST. This table is defined by data macro CN1ST. To expand this table to support 32-way loosely coupled processors, the data has been moved to FACE fixed file record type #CN1ST, with 64 ordinals. Segment CYYF has been created, similar to CYYA and CYYM, to handle file input and output for the new records. When the loosely coupled complex is operating in coexistence mode, segment CYYF supports access to the old subsystem state table in CTKI by processors with 32-way loosely coupled processor support installed by accessing the data in CTKI and reformatting it so that it appears to be in 32-way loosely coupled format.
CTKC maintains a table of terminals used in the TPF complex. To expand this table for 32-way loosely coupled processors, the CK8KE macro and the data in CTKC have been expanded. Segments CYYK and CYYL have been added and are called by segments CYYA and CYYM to handle file input and output for CTKC. When the loosely coupled complex is operating in coexistence mode, CTKC (including the CK8KE macro) is loaded in main storage and formatted to 32-way loosely coupled format. CTKC and CK8KE are formatted back to 8-way loosely coupled format before being filed.
General file support currently uses one ordinal from the #IBMM4 record type for each processor in the TPF complex to hold the associated general file control record (GFCR). #IBMM4 records, ordinal numbers 101 - 108, are used to support the current maximum 8-way loosely coupled complex. With 32-way loosely coupled processor support, the GFCR is allocated as a single ordinal number (29) in processor unique record type #IBMMP4.
Migration to the #IBMMP4 processor unique record type occurs during general file restart. Each processor migrates or initializes only its own records. General file restart does the following:
The GFCR information in the #IBMM4 records is not changed.
GDS support currently uses ordinal numbers from processor shared fixed record type #DSCRI for restart control records (RCRs). The logical ordinal number mapping for a processor is based on the assignment of every eighth ordinal because a maximum of eight processors are allowed. With 32-way loosely coupled processor support, the general data set RCRs are allocated to processor unique record type #DSCRU.
Migration to the #DSCRU processor unique record type occurs during GDS restart. Each processor migrates or initializes only its own records. GDS restart does the following:
The RCR information in the #DSCRI records is not changed.
IPC uses an 8-bit mask to represent the processors in the loosely coupled complex. To support 32-way loosely coupled processors, IPC has been extended to use the list facility originally implemented for the internal event facility (IEF).
The list facility allows an IPC transmission to specify the following processor groupings as a destination:
32-way loosely coupled processor support for keypoint accessing addresses the following three areas:
To support 32-way loosely coupled processors using the same records, the table entry size has been reduced to 16 bytes and indexing into the table has been changed to use the keypoint ordinal in CX0KPO.
During coexistence, the record retriever function converts the status table to its new format when reading from file. When all processors are using 32-way loosely coupled processor support, use the ZMIGR command to convert the table to the new format on file. See TPF Operations for more information about the ZMIGR command.
To resolve these problems, keypoint fallback extents have been moved to their own record type, #KFBX0 - #KFBXnnn. To allow expansion as new processors are added to the TPF complex, a keypoint pointer record has been created in ordinal 0 for #KEYPT ordinals #KFBX0 - #KFBXnnn that allows the keypoint to be stored in multiple file extents (multiple RAMFIL statements along with the PRIOR parameter can be used to define these record types).
The new keypoint pointer record is created and updated during TPF 4.1 system restart. The ZKPTR command has been implemented so that you can control how system restart processes the keypoint pointer records if an error occurs. See TPF Operations for more information about the ZKPTR command.
To save system resources and allow for future expansion, the #SONRPE records that were used for recoup chain chasing are being replaced with processor shared fixed file records #SONRPEx, where x is the ordinal number for the processor for which the record is used.
For a base-only system, the only record required is #SONRPE0. For a
loosely coupled complex, each of the first eight processors requires a
record. All processors after the first eight do not require a
#SONRPEx record. For example, if there are eight processors,
the #SONRPEx records that are used are shown in Table 1192.
Processor ID | Processor Ordinal | #SONRPEx Used |
---|---|---|
B | 0 | #SONRPE0 |
C | 1 | #SONRPE1 |
D | 2 | #SONRPE2 |
E | 3 | #SONRPE3 |
F | 4 | #SONRPE4 |
G | 5 | #SONRPE5 |
Z | 6 | #SONRPE6 |
0 | 7 | #SONRPE7 |
To handle the additional processors in a 32-way loosely coupled complex, the number of #FC33 fixed file records is increased from 65 to 257. The @@BUSED field, which contains bit maps used to track use of #FC33 records, has been replaced by the @@BUSED32 field, which supports 32 processors..
There are none.
The following section summarizes interface changes.
The following section summarizes C/C++ language changes. This information is presented in alphabetic order by the type of C/C++ language information. See the TPF C/C++ Language Support User's Guide and TPF Application Programming for more information about the C/C++ language.
Table 1193 summarizes changes to the build scripts used by the build
tool. This information is presented in alphabetic order by the name of
the build script.
Table 1193. Changes to Build Scripts for 32-Way Loosely Coupled Processor Support
Build Script | Type | New, Changed, or No Longer Supported? | Description of Change |
---|---|---|---|
CIKFBS | DLM | New | Keypoint control record conversion utility for 32-way loosely coupled processor support. |
CIKZBS | DLM | New | Adds the KEYPOINT parameter to the ZMIGR command for 32-way loosely coupled processor support. |
CVZ5BS | DLM | New | Read and validate keypoint pointer record for 32-way loosely coupled processor support. |
CVZ6BS | DLM | New | System restart keypoint pointer record validation and update for 32-way loosely coupled processor support. |
CVZ7BS | DLM | New | Provides the ZKPTR command for 32-way loosely coupled processor support. |
CVZ8BS | DLM | New | Builds the keypoint pointer record extent table for 32-way loosely coupled processor support. |
Table 1194 summarizes changes to the dynamic load module (DLM)
stubs. This information is presented in alphabetic order by the name of
the DLM stub. See TPF Application Programming
for more information about the DLM stubs.
Table 1194. Changes to Dynamic Load Module (DLM) Stubs for 32-Way Loosely Coupled Processor Support
Name of DLM Stub | New or No Longer Supported? |
---|---|
CIKF | New |
CVZ4 | New |
CVZ5 | New |
CVZ8 | New |
Table 1195 summarizes the general use C/C++ language header file changes. This information is presented in alphabetic order by the name of the general use C/C++ language header file.
General use means these header files are available for your
use.
C/C++ Language Header File | New, Changed, or No Longer Supported? | Do You Need to Recompile Segments? | Segments to Recompile |
---|---|---|---|
c$cflv.h | Not Changed | Yes | User-defined segments that reference c$cflv.h. |
c$cx0ck.h | Changed | Yes | Programs included in Table 1208. |
c$fbd0.h | Changed | Yes | FTBD00, FTPS03, FTVA01. |
c$fer0.h | Changed | No | Not Applicable. |
c$fva0.h | Changed | Yes | Programs included in Table 1208. |
c$ic0ck.h | Changed | Yes | User-defined segments only. |
c$idskpt.h | Changed | Yes | Programs included in Table 1208. |
c$pi1dt.h | Changed | Yes | User-defined segments only. |
c$si3ct.h | Changed | Yes | User-defined segments that reference SI3DEST and programs included in Table 1208. |
c$syseq.h | Changed | Yes | Programs included in Table 1208. |
c$tglb.h | Changed | Yes | User-defined segments that reference c$tglb.h, segments in Table 1208, and CFL5, CFL6, CFL7, CFLE, CLM8LK. Link-edit DLMs CFL5, CFL6, CFLE, and CLM8. |
c$vfac.h | Not Changed | Yes | User-defined segments that reference c$vfac.h. |
sysapi.h | Changed | Yes | User-defined segments only. |
tpfapi.h | Changed | Yes | User-defined segments only. |
Table 1196 summarizes the general use C/C++ language header file
changes that are for IBM use only. This information is presented in
alphabetic order by the name of the general use C/C++ language header
file.
C/C++ Language Header File (IBM Use Only) | New, Changed, or No Longer Supported? | Do You Need to Recompile Segments? | Segments to Recompile |
---|---|---|---|
i$dlok.h | Changed | No | Not Applicable |
i$kptr.h | New | No | Not Applicable. |
i$mqrt.h | Changed | Yes | CMQCKP, CMQGRU, CMQRCV, CMQMRM, CMQXRM. |
i$netd.h | Changed | Yes | CINET1, CINET3, CINET4, CINET5, CINET6, CINET7, CINET8, CINETA, CINETN, and programs included in Table 1208. |
i$tmcr.h | Changed | Yes | CL15, CXPRCV, CXQRCV. |
zimag.h | Changed | Yes | Programs included in Table 1208. |
zimageq.h | Changed | Yes | Programs included in Table 1208. |
zimagmsg.h | Changed | Yes | CIMO, CIMP, CIMQ, CIMU and programs included in Table 1208. |
ztpld.h | Changed | Yes | CIL0, CIL1, CIL2, CIL3, CIL4, CIL5, CIL6, CIL7, CILA, CILB, CILD, CILF, CILO, CILX. |
There are no changes.
Table 1197 summarizes changes to the link-edited modules shipped by
IBM, which should go into a data set with attributes
DCB=(RECFM=U,LRECL=80,BLKSIZE=1200). This information is presented in
alphabetic order by the name of the link-edited module.
Table 1197. Changes to Link-Edited Modules for 32-Way Loosely Coupled Processor Support
Link-Edited Module | New, Changed, or No Longer Supported? | Description of Change |
---|---|---|
CDCP | Not Changed | References equate macro file TPFGLB. |
CDNF | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CFL5 | Not Changed | References C header file c$tglb.h. |
CFL6 | Not Changed | References C header file c$tglb.h. |
CFLE | Not Changed | References C header file c$tglb.h. |
CFLK | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CIKB | Not Changed | Changes to ZIMAG command for 32-way loosely coupled processor support. |
CIKF | New | Keypoint control record conversion utility for 32-way loosely coupled processor support. |
CIKZ | New | Adds the KEYPOINT parameter to the ZMIGR command for 32-way loosely coupled processor support. |
CILA | Not Changed | Updates to members for 32-way loosely coupled processor support. |
CILB | Not Changed | Updates to members for 32-way loosely coupled processor support. |
CILO | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CIMA | Not Changed | Updates to members for 32-way loosely coupled processor support. |
CIMN | Not Changed | Updates to members for 32-way loosely coupled processor support. |
CIMU | Not Changed | Updates to members for 32-way loosely coupled processor support. |
CL15 | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CL40 | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CL4B | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CLM8 | Not Changed | References C header file c$tglb.h. |
CLTW | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CLTX | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CLTZ | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CMQM | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CMQX | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CRPC | Not Changed | Members recompiled because of updates for 32-way loosely coupled processor support. |
CTFT | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CTUU | Not Changed | Members CTU1, CTU2, and CTU4 changed for 32-way loosely coupled processor support. |
CTXO | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CUIU | Not Changed | Members need to be recompiled because of updates for 32-way loosely coupled processor support. |
CVZ5 | New | Reads and validates keypoint pointer record for 32-way loosely coupled processor support. |
CVZ6 | New | System restart validate and update keypoint pointer record for 32-way loosely coupled processor support. |
CVZ7 | New | Adds the ZKPTR command for 32-way loosely coupled processor support. |
CVZ8 | New | Builds the keypoint pointer record extent table for 32-way loosely coupled processor support. |
Table 1198 summarizes changes to members. This information is presented in alphabetic order by the name of the member.
Notes:
Table 1198. Changes to Members for 32-Way Loosely Coupled Processor Support
Member | DLM/DLL/LLM Name | Type | New, Changed, or No Longer Supported? | Member Type | Description of Change |
---|---|---|---|---|---|
CCOMIC | CTAL | LLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CDNSSC | CDNC | DLM | Changed | C Language | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CEL5 | CEL5 | DLM | Changed | C Language | Updated for PIDT mask usage changes. |
CFDSC | CFLY | DLM | Changed | C Language | Updated for PIDT mask usage changes. |
CFLW | CFLK | DLM | Changed | Assembler | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CGENLC | CTAL | LLM | Changed | Assembler | Changes to the tpf_genlc function. |
CIKA | CIMA | DLM | Changed | C Language | Make keypoint control items keypoint ordinal indexed and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CIKB | CIKB | DLM | Changed | C Language | Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CIKF | CIKF | DLM | New | C Language | Keypoint control record conversion utility for 32-way loosely coupled processor support. |
CIKZ | CIKZ | DLM | New | C Language | Added support for the KEYPOINT parameter of the ZMIGR command. |
CIL0 | CILA | DLM | Changed | C Language | Use the SAMXPRO equate value for the maximum number of processors and make keypoint control items keypoint ordinal indexed. |
CIL5 | CILA | DLM | Changed | C Language | Make keypoint control items keypoint ordinal indexed; and convert keypoint control record to 32-way loosely coupled format when read, and back to the previous format when filed. |
CILB | CILB | DLM | Changed | C Language | Make keypoint control items keypoint ordinal indexed and add a new message. |
CIMN | CIMN | DLM | Changed | C Language | Convert keypoint control record to 32-way loosely coupled format when read, and back to the previous format when filed. |
CIMO | CIMA | DLM | Changed | C Language | Use the SAMXPRO equate value for the maximum number of processors, and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CIMQ | CIMA | DLM | Changed | C Language | Use the SAMXPRO equate value for the maximum number of processors, and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CIMT | CIMA | DLM | Changed | C Language | Use the SAMXPRO equate value for the maximum number of processors, make keypoint control items keypoint ordinal indexed, and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CINET2 | CDNS, CLTV, CLTY, CMAT | DLM | Changed | C Language | New Internet daemon (INETD) record type. |
CL12 | CL12 | DLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL13 | CL13 | DLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL14 | CL14 | DLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL16 | CL16 | DLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL40 | CL40 | DLM | Changed | C Language | Removed check on HALF_MEG for base only path. |
CL42 | CL42 | DLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL4A | CL40 | DLM | Changed | C Language | Added merged file address table full to deadlock detection and replaced hardcoded '8' processors with TPFGLB equate SAMXPRO. |
CL4B | CL4B | DLM | Changed | C Language | Replace hardcoded '8' processors with TPFGLB equate SAMXPRO. |
CL4D | CL40 | DLM | Changed | C Language | Added merged file address table full to deadlock detection. |
CLCC | CLCC | DLM | Changed | C Language | New Common Link Access to Workstation (CLAW) record type. |
CLCD | CLCD | DLM | Changed | C Language | New CLAW record type. |
CLTR | CLTR | DLM | Changed | C Language | New CLAW record type. |
CLTU | CLTN | DLM | Changed | C Language | New CLAW record type. |
CMQRM | CMQS | DLL | Changed | C++ Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CSIPCC | CTAL | LLM | Changed | Assembler | Updated to support 32-way loosely coupled processors. |
CTU1 | CTUU | DLM | Changed | C Language | Updated for 32-way loosely coupled processor support. |
CTU2 | CTUU | DLM | Changed | C Language | Updated for 32-way loosely coupled processor support. |
CTU4 | CTUU | DLM | Changed | C Language | Updated for 32-way loosely coupled processor support. |
CVZ5 | CVZ5 | DLM | New | C Language | Read and validate keypoint pointer record. |
CVZ6 | CVZ6 | DLM | New | C Language | Validate and update keypoint pointer record during system restart. |
CVZ7 | CVZ7 | DLM | New | C Language | Adds support for the ZKPTR command. |
CVZ8 | CVZ8 | DLM | New | C Language | Builds the keypoint pointer record extent table. |
CVZ9 | CVZ8 | DLM | New | Assembler | Gets DASD constants for the keypoint record build extent table function. |
CXACMT | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXAEND | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXAPRP | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXARCV | CTAL | LLM | Changed | C Language | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CXARLB | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXASTR | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXPCMT | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXPRLB | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXQCMT | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXQPRP | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
CXQRLB | CTAL | LLM | Changed | Assembler | Updated to point to 32-way loosely coupled processor table. |
There are no changes.
There are no changes.
l
There are no changes.
Table 1199 summarizes the copy member changes. This information
is presented in alphabetic order by the name of the copy member.
Table 1199. Changes to Copy Members for 32-Way Loosely Coupled Processor Support
Copy Member | Type | New, Changed, or No Longer Supported | Segment Where Copy Member is Included | Name of Link-Edited Module | DLM, DLL, LLM, or Control Program | Description of Change |
---|---|---|---|---|---|---|
CDC1 | CP | Changed | CCDCOL | CPS0 | Control Program | Updated for changes to the SIPCC macro interface. |
CICR | CP | Changed | CCNUCL | CPS0 | Control Program | Changes to comments only. |
CICS | CP | Changed | CCNUCL | CPS0 | Control Program | Updated for 32-way loosely coupled processor support. |
CIEF | CP | Changed | CCCIEF | CPS0 | Control Program | Changes to the GENLC macro. |
CJ341 | Real-Time Assembler | Changed | CJ005 | CJ00 | LLM | Changes to interprocessor communications (IPC) user level. |
CL10 | CP | Changed | CCTLOG | CPS0 | Control Program | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL20 | CP | Changed | CCTLOG | CPS0 | Control Program | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CL30 | CP | Changed | CCTLOG | CPS0 | Control Program | Use new commit and rollback control table pointer for 32-way loosely coupled processor support. |
CNOM | CP | Changed | CCSICF | CPS0 | Control Program | Changes to the SIPCC macro. |
CNP0 | CP | Changed | CCSICF | CPS0 | Control Program | Changes to the SIPCC macro. |
CNP6 | CP | Changed | CCSICF | CPS0 | Control Program | Changes to the SIPCC macro. |
CT09 | CP | Changed | CCCTIN | CPS0 | Control Program | Added support for #RLOG9 - 32. |
CT41 | CP | Changed | CCCTIN | CPS0 | Control Program | Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
IB01 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, and added new fallback extent support. |
IB02 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, added new fallback extent support, and updated for CTKC coexistence. |
IB03 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, and added new fallback extent support. |
IB07 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Updated for CTKI coexistence. |
IBF1 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, and added new fallback extent support. |
IBF2 | Real-Time Assembler | Changed | IPLB | Not Applicable | Not Applicable | Updated for PIDT mask usage. |
Table 1200 summarizes fixed file record changes. This
information is presented in alphabetic order by the name of the fixed file
record.
Table 1200. Changes to Fixed File Records for 32-Way Loosely Coupled Processor Support
Fixed File Record | New, Changed, or No Longer Supported? | Description of Change |
---|---|---|
#BRIDCOR | Changed | Increased required minimum number of ordinals to 256. |
#CB8HD | No Longer Supported | Replaced by fixed file record #HDREC. |
#CN1ST | New | Expanded subsystem state table (CN1ST) to support 32-way loosely coupled processors. |
#DSCRI | No Longer Supported | Replaced by #DSCRU to support 32-way loosely coupled processors. |
#DSCRU | New | General data set (GDS) support, replacing #DSCRI. |
#HDREC | New | New record to expand multi-processor interconnect facility (MPIF) hardware definition to support 32-way loosely coupled processors. |
#IBMMP4 | Changed | Increased the required minimum number of ordinals to 100. |
#IBMMS | Changed | Increased the minimum number of ordinals to 60. |
#IDCF1 | New | New record to expand Internet daemon configuration file (IDCF) to support 32-way loosely coupled processors. |
#KBA | Changed | Reduced minimum number of ordinals to (number_of_processor-unique_keypoints × number_of_processors) + number_of_processor-shared keypoints + 1. |
#KEYPT | Changed | Changed to allow multiple keypoint fallback extents (more than one on RAMFIL statement). |
#KFBX0 - 254 | New | New records to support keypoint fallback extents for 32 loosely coupled processors. |
#KSA1 - #KSA8 | Changed | Reduced minimum number of ordinals to (number_of_processor-unique_keypoints × number_of_processors) + number_of_processor-shared keypoints + 1. |
#PDREC | Changed | Reduced minimum number of ordinals to 4. |
#PDREU | New | New record to expand MPIF path definition to support 32-way loosely coupled processors. |
#RC8RFS | Changed | Increased the minimum number of ordinals from 65 to 257. |
#RLOG9 - #RLOG32 | New | New commit and rollback logging records for processors 9 - 32. |
#SONRPE | No Longer Supported | Replaced by #SONRPE0 - 7 to support 32-way loosely coupled processors. |
#SONRPE0 - 7 | New | New recoup pseudo directories for processors 0 - 7. |
The following section summarizes the macro changes. This information is presented in alphabetic order by the type of macro.
There are no changes.
There are no changes.
Table 1201 summarizes the data macro changes. This information
is presented in alphabetic order by the name of the data macro.
Table 1201. Changes to Data Macros for 32-Way Loosely Coupled Processor Support
Data Macro | New, Changed, or No Longer Supported? | Do You Need to Reassemble Programs Using This Data Macro? | Programs to Reassemble |
---|---|---|---|
BRPEQ | Changed | Yes | Programs included in Table 1208. |
CB8HD | Changed | Yes | Programs included in Table 1208. |
CB9PD | Changed | Yes | Programs included in Table 1208. |
CK8KE | Changed | Yes | CCNUCL, CCCCP1, CCCTIN, CGT0, CGT1, CIJG, CVAD, CVAU, CVFF, CVFO, CVFP, CVFQ, CVHA, CVHB, CVHC, CVHF, CVHL, CVHY, CVIQ, CVKM, CVKN, CVLA, CVPX, CVP1, CVRN, CWA0, CWBL, CWGM, CWGO, CWGX, CYYE, XLAA, XLDD, XLEF, XLJK. |
CN1ST | Changed | Yes | Programs included in Table 1199 and user-defined. |
CONKC | Changed | Yes | CONK |
CR0AT | Changed | Yes | CCCCP1, CCCCP4, CCCTIN, CCNUCL, CGT0, CGT1, CGT2, CGT4, CGT5, CGT8, CGT9, CIJG, CMID, COUF, CSOR, CTKT, CVPX, CVAD, CVAU, CVFF, CVFO, CVFP, CVFQ, CVHA, CVHB, CVHC, CVHF, CVHL, CVHY, CVIQ, CVKM, CVKN, CVLA, CVP1, CVRN, CWA0, CWBL, CWGM, CWGO, CWGX, CYYE, IPLB, XLAA, XLDD, XLEF, XLJK. |
CX0CK | Changed | Yes | Programs included in Table 1208. |
DCTIGT | Changed | No | Not Applicable |
DCTMGT | Changed | Yes | Programs included in Table 1208. |
GENFD | Changed | Yes | Programs included in Table 1208. |
GO1GO | Changed | Yes | BAM1, GLBL, GOG1, GOG3, GOG5, GOGO. |
I80I8 | Changed | Yes | Programs included in Table 1208. |
I82I8 | Changed | Yes | Programs included in Table 1208. |
IB0CT | Changed | Yes | Programs included in Table 1199 and in Table 1208. |
IC0CK | Changed | Yes | Programs included in Table 1199 and user-defined. |
ICFLV | Not Changed | Yes | User-defined programs that reference data macro ICFLV. |
ICRCT | Changed | Yes | CCTLOG, CDCR, CL26, CL99, CLH0, CLH2, CTMCCR, CTMPRP, CXACMT, CXAEND, CXAPRP, CXARLB, CXASTR, CXPCMT, CXPRCV, CXPRLB, CXQCMT, CXQPRP, CXQRCV, CXQRLB, IPLB, JCD4, JCS0. |
IDSDLR | Changed | Yes | Programs included in Table 1208. |
IDSKPT | Changed | No | Not Applicable. |
IDSSST | Changed | No | Not Applicable. |
IKPTR | New | No | Not Applicable. |
LDCRL | Changed | Yes | ACPL and ALDR |
NC0CB | Changed | Yes | Programs included in Table 1208. |
PI1DT | Changed | Yes | Programs included in Table 1199 and user-defined. |
RC1IT | Changed | Yes | CONN |
RECOUP | Changed | Yes | Programs included in Table 1199 and user-defined. |
SI3CT | Changed | Yes | Programs included in Table 1199 and user-defined. |
SI4CT | Changed | No | Not Applicable. |
ST0TB | Changed | Yes | OSTGIP, OSTGOT, OSTGP2, OSTGRT, OSTGUP. |
VF0AC | Not Changed | Yes | User-defined programs that reference data macro VF0AC. |
Table 1202 summarizes the general macro changes. This
information is presented in alphabetic order by the name of the general
macro. See TPF General Macros for a complete
description of all general macros.
Table 1202. Changes to General Macros for 32-Way Loosely Coupled Processor Support
General Macro | New, Changed, or No Longer Supported? | Do You Need to Reassemble Programs? | Programs to Reassemble |
---|---|---|---|
GENLC | Changed | No | Not Applicable. |
Table 1203 summarizes the selected equate macro changes. This
information is presented in alphabetic order by the name of the selected
equate macro.
Table 1203. Changes to Selected Equate Macros for 32-Way Loosely Coupled Processor Support
Selected Equate Macro | New, Changed, or No Longer Supported? | Do You Need to Reassemble Programs? | Programs to Reassemble |
---|---|---|---|
CFMDC | Changed | Yes | ICDF, STPP. |
CPSEQ | Changed | No | Not Applicable. |
CZ1SE | Changed | No | Not Applicable. |
CZ3CP | Changed | No | Not Applicable. |
SYSEQ | Changed | No | Not Applicable. |
TPFGLB | Changed | Yes | User-defined programs that use TPFGLB or data macros ICFLV or VF0AC, programs included in Table 1208, and B0SH, BOFH, BRSH, BXAT, CCCTIN, CCDBAF, CCFADC, CCNUCL, CCRCSC, CCSONS, CCTLOG, CCVAGE, CCVFAC, CDCR, CLMK, CLML, CLMN, CORB, CPAA, CTKR, CTKT, CVF2, CVF4, CVF7, CVF8, CVF9, CVFS, CVFX, CZXM, IPLB, JCF0, JCS0. Link-edit DLM CDCP. |
There are no changes.
Table 1204 summarizes the system initialization program (SIP) skeleton
and internal macro changes. This information is presented in alphabetic
order by the name of the SIP skeleton and internal macro. If the SIP
skeleton and internal macro (inner macro) is changed, you must reassemble the
SIP Stage I deck and run the appropriate job control language (JCL) jobs from
the SIP Stage II deck.
Table 1204. Changes to SIP Skeleton and Internal Macros for 32-Way Loosely Coupled Processor Support
SIP Skeleton and Internal Macro | New, Changed, or No Longer Supported? |
---|---|
GENC | Changed |
GEND | Changed |
GENR | Changed |
SKANTD | Changed |
SKCTKC | Changed |
SKCTKI | Changed |
SKCTKX | Changed |
SKGLB | Changed |
SKRCIT | Changed |
SKSET | Changed |
SPERR | Changed |
SPERRG | Changed |
Table 1205 summarizes system initialization program (SIP) Stage I macro and statement changes. This information is presented in alphabetic order by the name of the SIP Stage I macro. See TPF System Generation for a complete description of the SIP Stage I macros. If the SIP Stage I macro is changed, you must run the appropriate job control language (JCL) jobs from the SIP Stage II deck
See System Initialization Program (SIP) and System Generation Changes for a description of other system generation changes you
must make.
SIP Stage I Macro | New, Changed, or No Longer Supported? |
---|---|
CONFIG | Changed |
CRASTB | Changed |
GENSIP | Changed |
RAM | Changed |
SPCPU | Changed |
SPGLB | Changed |
SPPGML | Changed |
SPREPT | Changed |
Table 1206 summarizes system initialization program (SIP) Stage II
macro changes. This information is presented in alphabetic order by the
name of the SIP Stage II macro. If IBMPAL is changed, you must run the
system allocator (SALO) and load the new program allocation table
(PAT) to the TPF 4.1 system.
Table 1206. Changes to SIP Stage II Macros for 32-Way Loosely Coupled Processor Support
SIP Stage II Macro | New, Changed, or No Longer Supported? |
---|---|
IBMPAL | Changed |
There are no changes.
Table 1207 summarizes system macro changes. This information is
presented in alphabetic order by the name of the system macro. See TPF System Macros for a complete description of all
system macros.
Table 1207. Changes to System Macros for 32-Way Loosely Coupled Processor Support
System Macro | New, Changed, or No Longer Supported? | Do You Need to Reassemble Programs? | Programs to Reassemble |
---|---|---|---|
SIPCC | Changed | Yes | User-defined programs only. |
There are no changes.
Table 1208 summarizes segment changes. This information is
presented in alphabetic order by the name of the segment.
Table 1208. Changes to Segments for 32-Way Loosely Coupled Processor Support
Segment | Type | Link-Edit Module (Where Offline Segment Is Linked) | New, Changed, or No Longer Supported? | Description of Change |
---|---|---|---|---|
ACPL | Offline Assembler | Not Applicable | Changed | Make keypoint control items keypoint ordinal indexed; and convert keypoint control records to 32-way loosely coupled format when read, and back to the previous format when filed. Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
B0BK | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
B0P0 | Real-Time Assembler | Not Applicable | Changed | Added restriction on Recoup and updated for changes to SIPCC macro interface. |
B0P3 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
B0P5 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
B0PE | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
B1A0 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT and changes to SIPCC macro interface. |
B1A4 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT. |
B1BK | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BAM0 | Real-Time Assembler | Not Applicable | Changed | Updated maximum processor value. |
BAM1 | Real-Time Assembler | Not Applicable | Changed | Updated for 32-way loosely coupled globals format. |
BCPE | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT. |
BCPU | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the 1052 FC33 record. |
BCPY | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed file records. |
BCPZ | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed file records. |
BDBA | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
BKA0 | Real-Time Assembler | Not Applicable | Changed | Updated maximum processor value. |
BKP0 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BKP3 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BKP4 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BKP5 | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BKPA | Real-Time Assembler | Not Applicable | Changed | Updated recoup duplicate message sender for 32-way loosely coupled processor support. |
BLOG | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the following:
|
BLOH | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT. |
BOF0 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the CPU ID in the I82I8 data macro. |
BOF3 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to #SONRPEx fixed file records. |
BOF4 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to #SONRPEx fixed file records. |
BOF7 | Real-Time Assembler | Not Applicable | Changed | Updated for 1052 I8 record. |
BOF8 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the CPU ID in the I82I8 data macro. |
BOFA | Real-Time Assembler | Not Applicable | Changed | Updated for the following changes:
|
BOFF | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BPDH | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRCP | Real-Time Assembler | Not Applicable | Changed | Updated for the SIPCC macro list interface. |
BRCQ | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the 1052 FC33 record. |
BRID | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
BRPE | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT. |
BRV0 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRV1 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRV2 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRV3 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRV5 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the #SONRPEx fixed records. |
BRVT | Real-Time Assembler | Not Applicable | New | Added recoup function to the ZMIGR command. |
BRYO | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in the RECOUP DSECT. |
BRYU | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
BWRT | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
BXA1 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage, changes to the SIPCC macro interface, and changes to #KEYPT and #KFBXn fixed file records. |
BXA2 | Real-Time Assembler | Not Applicable | Changed | Updated to use CYYF to retrieve #CN1ST fixed record type. |
BXAB | Real-Time Assembler | Not Applicable | Changed | Updated to use 32-way loosely coupled processor support. |
BXBL | Real-Time Assembler | Not Applicable | Changed | Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
BXDP | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
BXPC | Real-Time Assembler | Not Applicable | Changed | Updated for 32-way loosely coupled processor support. |
BXPR | Real-Time Assembler | Not Applicable | Changed | Updated for 32-way loosely coupled processor support. |
C277 | Real-Time Assembler | Not Applicable | Changed | Target TPF-C no longer supported for SIPCC. |
CBE2 | Real-Time Assembler | Not Applicable | Changed | Updated MPIF help message. |
CBG2 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBO0 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBO1 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBP0 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBP1 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBP3 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBR0 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBR1 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBR2 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CBY0 | Real-Time Assembler | Not Applicable | Changed | New MPIF record types or expanded data structures. |
CDL0 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CDL1 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors and changes to the SIPCC macro interface. |
CDL2 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors and changes to the SIPCC macro interface. |
CDL3 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors and changes to the SIPCC macro interface. |
CDL5 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks and modified communications to support 32-way loosely coupled processors. |
CDL6 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks and modified communications to support 32-way loosely coupled processors. |
CDL8 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CFL8 | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CFL9 | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CHEA | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CHKB | Real-Time Assembler | Not Applicable | Changed | Comments were updated for 32-way loosely coupled processors. |
CHKR | Real-Time Assembler | Not Applicable | Changed | Comments were updated for 32-way loosely coupled processors. |
CHZS | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CJ05 | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CL11 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table and expanded table of system log record FACE-type equates. |
CL21 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table and expanded table of system log record FACE-type equates. |
CL22 | Real-Time Assembler | Not Applicable | Changed | Expanded table of system log record FACE-type equates for 32-way loosely coupled processors. |
CL23 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table and expanded table of system log record FACE-type equates. |
CL24 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table and expanded table of system log record FACE-type equates. |
CL31 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table. |
CLM0 | Real-Time Assembler | Not Applicable | Changed | Changed to use new commit and rollback pointer for 32-way loosely coupled processor support expanded table. |
CLM1 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CLME | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CLMF | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CLMG | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CLMH | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CLMI | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CLMM | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support and deleted unused save areas. |
CLMO | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CLMP | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CLMR | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CLMU | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CMT9 | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CMTQ | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CMVS | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CNAC | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level to decrement the active processor count and reset the 32-way loosely coupled processor support flag in PIDT when a processor is deactivated. |
CNAE | Real-Time Assembler | Not Applicable | Changed | Added calls to CYYF to access the #CN1ST fixed file record type and updated IPC base support and user level for 32-way loosely coupled processor support. |
CNAF | Real-Time Assembler | Not Applicable | Changed | Added calls to CYYF to access the #CN1ST fixed record type. |
CNAH | Real-Time Assembler | Not Applicable | Changed | Added calls to CYYF to access the #CN1ST fixed record type and updated for changes to the SIPCC macro interface. |
CNAI | Real-Time Assembler | Not Applicable | Changed | Updated to save and restore the registers of the calling routine. |
CNAJ | Real-Time Assembler | Not Applicable | Changed | Added calls to CYYF to access the #CN1ST fixed record type and updated for changes to the SIPCC macro interface. |
CNAK | Real-Time Assembler | Not Applicable | Changed | Updated comments and changes to the SIPCC macro interface. |
CNBA | Real-Time Assembler | Not Applicable | Changed | Updated to support CTKI coexistence for 32-way loosely coupled processor support. |
CNON | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CNOP | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CNOQ | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CNOR | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CNPH | Real-Time Assembler | Not Applicable | Changed | Added restriction on PROT. |
CNPU | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CNPY | Real-Time Assembler | Not Applicable | Changed | Updated CTKI and PIDT initialization and added calls to CYYF to access the #CN1ST fixed record type. |
COAD | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
COAH | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CONN | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
COTB | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CPAB | Real-Time Assembler | Not Applicable | Changed | Removed 8-way processor constraint in RCS support. |
CPAI | Real-Time Assembler | Not Applicable | Changed | Removed 8-way processor constraint in RCS support. |
CQAE | Real-Time Assembler | Not Applicable | Changed | Updated clock support for 32-way loosely coupled processors. |
CQAL | Real-Time Assembler | Not Applicable | Changed | Updated clock support for 32-way loosely coupled processors. |
CQAP | Real-Time Assembler | Not Applicable | Changed | Updated clock support for 32-way loosely coupled processors. |
CQAQ | Real-Time Assembler | Not Applicable | Changed | Updated clock support for 32-way loosely coupled processors. |
CSA0 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSA1 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSA2 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks and modified communications to support 32-way loosely coupled processors. |
CSA8 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSAG | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors and for changes to the SIPCC macro interface. |
CSAI | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CSBS | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CSCD | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSCZ | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSG0 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSG9 | Real-Time Assembler | Not Applicable | Changed | Expanded 1-byte processor masks to support 32-way loosely coupled processors. |
CSS1 | Real-Time Assembler | Not Applicable | Changed | Removed 8-way processor constraint in RCS support. |
CSS8 | Real-Time Assembler | Not Applicable | Changed | Updated to add support for the RCS and IPC. |
CTKS | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage, and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CVAB | Real-Time Assembler | Not Applicable | Changed | Added support for the ZMIGR and ZKPTR commands. |
CVAQ | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CVGA | Real-Time Assembler | Not Applicable | Changed | Changed for general data set (GDS) restart control record structure in fixed record type #DSCRU. |
CVGH | Real-Time Assembler | Not Applicable | Changed | Changed for GDS restart control record structure in fixed record type #DSCRU. |
CVGP | Real-Time Assembler | Not Applicable | Changed | Changed for general file (GF) control record structure in fixed record type #IBMMP4. |
CVGR | Real-Time Assembler | Not Applicable | Changed | Changed for GDS restart control record structure in fixed record type #DSCRU. |
CVHF | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CVPQ | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CVPR | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CVPX | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CVRM | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CVRN | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CVRQ | Real-Time Assembler | Not Applicable | Changed | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, and added multiple fallback extent support. |
CVUB | Real-Time Assembler | Not Applicable | Changed | Added GF control record migration status messages. |
CVZ1 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage, and new fallback extent record type support. |
CVZ2 | Real-Time Assembler | Not Applicable | Changed | Split #KEYPT support between #KEYPT and #KFBXn fixed file records, and added multiple fallback extent support. |
CVZ4 | Real-Time Assembler | Not Applicable | New | Provided support to split #KEYPT support between #KEYPT and #KFBXn fixed file records and map keypoint ordinal to FACE ordinal. |
CVZB | Real-Time Assembler | Not Applicable | Changed | Added multiple fallback extent support. |
CWGO | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CYEP | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CYF1 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CYF3 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CYF8 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CYGN | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CYH0 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CYH3 | Real-Time Assembler | Not Applicable | Changed | Updated to use the SAMXPRO equate value for the maximum number of processors. |
CYH4 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to PIDT mask usage. |
CYPR | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CYPS | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
CYTT | Real-Time Assembler | Not Applicable | Changed | Changed for GF control record structure in fixed record type #IBMMP4. |
CYYA | Real-Time Assembler | Not Applicable | Changed | Updated to call segment CYYK to file CTKC data. |
CYYB | Real-Time Assembler | Not Applicable | Changed | Removed reference to processor equates in CX0CK, and split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CYYD | Real-Time Assembler | Not Applicable | Changed | Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
CYYE | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
CYYF | Real-Time Assembler | Not Applicable | New | Adds find and file services for the #CN1ST fixed record type. |
CYYG | Real-Time Assembler | Not Applicable | New | Provides the parser function for the ZMIGR command parameters. |
CYYH | Real-Time Assembler | Not Applicable | New | Provides the CTKI function for the ZMIGR command. |
CYYJ | Real-Time Assembler | Not Applicable | New | Provides the CTKC function for the ZMIGR command and updated for changes to the SIPCC macro interface. |
CYYK | Real-Time Assembler | Not Applicable | New | Reformats CTKC to 8-way loosely coupled format, if necessary, before filing. |
CYYL | Real-Time Assembler | Not Applicable | New | Reformats CTKC to 32-way loosely coupled format, if necessary, before completing the find process. |
CYYM | Real-Time Assembler | Not Applicable | Changed | Updated to call segment CYYL to find CTKC data. |
CZXD | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
DCR2 | Offline Assembler | DCRS | Changed | Removed CPMXCPU equate. |
DRD2 | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
DRD4 | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the SIPCC macro interface. |
DYDE | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the @@BUSED field in RECOUP DSECT. |
DYDI | Real-Time Assembler | Not Applicable | Changed | Updated for changes to the 1052 FC33 record. |
FTER00 | Offline C | FCTBG | Changed | Added support for new fallback extent record types (#KFBXn). |
FTGN00 | Offline C | FCTBG | Changed | Updated maximum number of processors. |
FTVA02 | Offline C | FCTBG | Changed | Added support for new fallback extent record types (#KFBXn), and updated RECNO requirements for #KBA and #KSA1 - 8. |
FTVA03 | Offline C | FCTBG | Changed | Added new INETD and MPIF record types, and added checks for #KFBX0-254 and #RLOG9 - 32. |
GOGO | Real-Time Assembler | Not Applicable | Changed | Updated for super GOA support. |
IPLA | Offline Assembler | Not Applicable | Changed | Split #KEYPT support between #KEYPT and #KFBXn fixed file records. |
JCD6 | Real-Time Assembler | Not Applicable | Changed | Updated to use CYYF to retrieve the #CN1ST fixed record type. |
OSTGRT | Offline Assembler | OSTG | Changed | Updated for 32-way loosely coupled processor support. |
STPP | Offline Assembler | PPCP | Not Changed | Reassembled to include changes to data macro CFMDC. |
TLDR | Offline Assembler | TPFLDR | Changed | Expanded the CPU ID table for 32-way loosely coupled processor support. |
XHA3 | Real-Time Assembler | Not Applicable | Changed | Updated to allow 32 processors to share the message switching queues. |
XLPP | Real-Time Assembler | Not Applicable | Changed | Updated IPC base support and user level for 32-way loosely coupled processor support. |
The following section summarizes system equate changes.
Table 1209 summarizes changes to equates that are not configuration
dependent (in SYSEQ). This information is presented in alphabetic order
by the name of the SYSEQ tag.
Table 1209. Changes to SYSEQ Tags for 32-Way Loosely Coupled Processor Support
SYSEQ Tag | Equate Value | New, Changed, or No Longer Supported? |
---|---|---|
#CRCRP8 - 31 | 171 - 194 | New |
#ICHUTLZ | 93 | New |
#INETDCF_OLD | 158 | New |
#MPIF_MIG1 | 169 | New |
#MPIF_MIG2 | 170 | New |
#RCPGLB | X'1B' - X'39' | Changed |
#TCPICDT | 59 | New |
#TCPIPCT | 58 | Changed |
#TCPIPCT_OLD | 150 | New |
There are no changes.
The following section summarizes functional and operational changes. This information is presented in alphabetic order by the functional or operational change.
See Appendix A, "PUT 2-15 Interface Changes by Authorized Program Analysis Report (APAR)" for a summary of functional and operational changes by APAR.
Table 1210 summarizes command changes. This information is presented in alphabetic order by the name of the command. See TPF Operations for a complete description of all commands.
Attention: Changes to commands can impact any automation
programs you are using in your complex.
Table 1210. Changes to Commands for 32-Way Loosely Coupled Processor Support
Command | New, Changed, or No Longer Supported? | Description of Change |
---|---|---|
ZCLAW | Changed | Documentation-only change to identify restrictions on using the command in a loosely coupled complex, which includes processors with and without 32-way loosely coupled processor support. |
ZINET ADD | Changed | Documentation-only change to identify restrictions on using the command in a loosely coupled complex, which includes processors with and without 32-way loosely coupled processor support. |
ZINET ALTER | Changed | Documentation-only change to identify restrictions on using the command in a loosely coupled complex, which includes processors with and without 32-way loosely coupled processor support. |
ZINET DELETE | Changed | Documentation-only change to identify restrictions on using the command in a loosely coupled complex, which includes processors with and without 32-way loosely coupled processor support. |
ZKPTR | New | Provides support for updating keypoint pointer records during system restart and for displaying keypoint pointer records. |
ZMIGR | New | Provides support for migration to 32-way loosely coupled processor support. |
ZMPIF | Changed | Added the ALL subparameter to the PDF INIT parameter option and documentation change to identify restrictions on using the command in a loosely coupled complex, which includes processors with and without 32-way loosely coupled processor support. |
Table 1211 summarizes message (offline and online messages) and system error changes.
The message IDs or system error numbers are listed in numeric order preceded by their alphabetic prefix. Some offline and online messages do not have a standard message ID. For these, the messages are presented in alphabetic order based on the initial message text; or for those messages that begin with variable information, the initial message text that follows that variable information. See Messages (System Error and Offline) and Messages (Online) for a complete description of all messages and system errors.
Attention: Changes to offline messages, online messages,
and system errors may impact any automation programs you are using in your
complex.
Table 1211. Changes to Messages and System Errors for 32-Way Loosely Coupled Processor Support
Message ID or System Error Number | Message Type | New, Changed, or No Longer Supported? |
---|---|---|
000074 | System Error | Changed |
0000EE | System Error | Changed |
000296 | System Error | New |
000297 | System Error | New |
000298 | System Error | New |
005100 | System Error | New |
005101 | System Error | New |
005102 | System Error | New |
005103 | System Error | New |
005104 | System Error | New |
005105 | System Error | New |
005106 | System Error | New |
005107 | System Error | New |
005108 | System Error | New |
005109 | System Error | New |
00510A | System Error | New |
00510B | System Error | New |
00510C | System Error | New |
006543 | System Error | New |
007701 | System Error | Changed |
00C13D | System Error | New |
ACPL0104E | Online | New |
ACPL0105W | Online | New |
ACPL0106E | Online | New |
ACPL0107W | Online | New |
B0P00006E | Online | New |
BOF80003I | Online | No Longer Supported |
BOF80008I | Online | New |
BRV30005E | Online | No Longer Supported |
BRV30006E | Online | No Longer Supported |
BRV30008E | Online | No Longer Supported |
BRV30009E | Online | No Longer Supported |
BRV30014E | Online | New |
BRV30015E | Online | New |
BRV30016E | Online | New |
BRV30017E | Online | New |
BRV50005E | Online | No Longer Supported |
BRV50006E | Online | No Longer Supported |
BRV50008E | Online | No Longer Supported |
BRV50009E | Online | No Longer Supported |
BRV50016E | Online | New |
BRV50017E | Online | New |
BRV50018E | Online | New |
BRV50019E | Online | New |
CBG20051I | Online | New |
CBG20052I | Online | New |
CBG20053I | Online | New |
CBG20054I | Online | New |
CBR10001E | Online | Changed |
CBR10002E | Online | Changed |
CBR10003I | Online | New |
CBR10004I | Online | New |
CBY00040E | Online | Changed |
CBY00050E | Online | Changed |
CBY00060E | Online | Changed |
CLAW0001I | Online | Changed |
CLAW0054I | Online | New |
CLAW0055I | Online | New |
CLTR0001I | Online | Changed |
CLTR0006I | Online | New |
CVRQ0001I | Online | No Longer Supported |
CVRQ0003I | Online | New |
CVZ10002I | Online | New |
CVZ10003E | Online | New |
CVZ10004E | Online | New |
CVZ60001A | Online | New |
CVZ60002A | Online | New |
CVZ60003E | Online | New |
CVZ60004I | Online | New |
CVZ60005W | Online | New |
CVZ60006T | Online | New |
DSMG0070E | Online | Changed |
DSMG0072E | Online | Changed |
DSMG0080E | Online | Changed |
DSMG0081E | Online | Changed |
DSMG0090E | Online | Changed |
DSMG0095E | Online | New |
DSMG0096I | Online | New |
DSMG0099E | Online | New |
DSMG0172E | Online | Changed |
FCTB0106I | Offline | Changed |
FCTB0122E | Offline | New |
FCTB0123W | Offline | New |
FMN0015I | Online | New |
FMN0017E | Online | New |
FMNT0018E | Online | New |
IMAG0011I | Online | No Longer Supported |
IMAG0021I | Online | No Longer Supported |
IMAG0211I | Online | New |
IMAG0221I | Online | New |
INET0020I | Online | New |
IPLA0050E | Online | Changed |
IPLA0055W | Online | New |
IPLA0056T | Online | New |
IPLB0003T | Online | New |
IPLB0008T | Online | New |
IPLB0009T | Online | New |
IPLB0013E | Online | New |
IPLB0018W | Online | New |
KPTR0001I | Online | New |
KPTR0002T | Online | New |
KPTR0003I | Online | New |
KPTR0004E | Online | New |
KPTR0005I | Online | New |
KPTR0006E | Online | New |
KPTR0007E | Online | New |
KPTR0010I | Online | New |
KPTR0020I | Online | New |
KPTR0030I | Online | New |
MIGR0001I | Online | New |
MIGR0002I | Online | New |
MIGR0003I | Online | New |
MIGR0004I | Online | New |
MIGR0005T | Online | New |
MIGR0006T | Online | New |
MIGR0007W | Online | New |
MIGR0008T | Online | New |
MIGR0009I | Online | New |
MIGR0010I | Online | New |
MIGR0011I | Online | New |
MIGR0012T | Online | New |
MIGR0013I | Online | New |
MIGR0014I | Online | New |
MIGR0015T | Online | New |
MIGR0016I | Online | New |
MIGR0017T | Online | New |
MIGR0018T | Online | New |
MIGR0019I | Online | New |
MIGR0020T | Online | New |
MIGR0021I | Online | New |
MIGR0022W | Online | New |
MIGR0023E | Online | New |
MIGR0025T | Online | New |
MIGR0030I | Online | New |
MIGR0031I | Online | New |
MIGR0032I | Online | New |
MIGR0033I | Online | New |
MIGR0034E | Online | New |
MIGR0035E | Online | New |
MIGR0036I | Online | New |
MIGR0037E | Online | New |
MIGR0038E | Online | New |
MIGR0039E | Online | New |
MIGR0040I | Online | New |
MIGR0041I | Online | New |
MIGR0042I | Online | New |
MIGR0043I | Online | New |
MIGR0044E | Online | New |
MIGR0045E | Online | New |
MPIF0038E | Online | Changed |
MPIF0054A | Online | Changed |
MPIF0064E | Online | Changed |
MPIF0079A | Online | Changed |
PMIG0015E | Online | New |
PROT0058E | Online | New |
TPLD0125E | Online | New |
TPLD0126E | Online | New |
There are no changes.
There are no changes.
There are no changes.
There are no changes.
There are no changes.
Table 1212 summarizes changes to the publications in the TPF
library. This information is presented in alphabetic order by the
publication title. See the TPF Library Guide
for more information about the TPF library.
Table 1212. Changes to TPF Publications for 32-Way Loosely Coupled Processor Support
Publication Title | Softcopy File Name | Description of Change |
---|---|---|
TPF C/C++ Language Support User's Guide | GTPCLU0F | Updated with changes to the sipcc and tpf_genlc functions for 32-way loosely coupled processor support. |
TPF Concepts and Structures | GTPCON0C | Updated for 32-way loosely coupled processor support. |
TPF Database Reference | GTPDBR0D | Updated keypoint equates for 32-way loosely coupled processor support. |
TPF General Macros | GTPGEN0E | Updated the GENLC macro for 32-way loosely coupled processor support. |
TPF Main Supervisor Reference | GTPMSR08 | Updated with CTKI changes for 32-way loosely coupled processor support. |
Messages (System Error and Offline) and Messages (Online) | Not Applicable | Updated with information about messages and system errors that were added, changed, and no longer supported for 32-way loosely coupled processor support. |
TPF Migration Guide: Program Update Tapes | GTPMG205 | Updated with migration considerations for 32-way loosely coupled processor support. |
TPF Operations | GTPOPR0F | Updated with information about the commands that were added and changed for 32-way loosely coupled processor support. |
TPF System Generation | GTPSYG0F | Updated macro record types for 32-way loosely coupled processor support. |
TPF System Installation Support Reference | GTPINR0F | Updated macro record types for 32-way loosely coupled processor support. |
TPF System Macros | GTPSYS0F | Updated the SIPCC macro for 32-way loosely coupled processor support. |
TPF Transmission Control Protocol/Internet Protocol | GTPCLW0B | Updated the Internet daemon (INETD) and CLAW device table (CDT) for 32-way loosely coupled processor support. |
There are no changes.
The following macros and functions have been enhanced:
There are no changes.
There are no changes.
There are no changes.
Before you begin your migration to 32-way loosely coupled processor
support, read Functional Overview and Architecture, paying particular attention to Coexistence and Migration and Fallback.
To Migrate Your Complex to 32-Way Loosely Coupled Processor Support
Before You Begin |
---|
|
See the GO1GO data macro for more information about the global fields and see TPF Program Development Support Reference for more information about DRIL.
Make sure that the required number of ordinals is specified. See TPF System Generation and Table 1069 for more information about fixed file record types; see TPF System Generation for more information about the RAMFIL macro.
See TPF System Generation for more information about the CONFIG and CRASTB macros.
During restart, message CVZ60001A is displayed for each subsystem being IPLed. This message will request the operator to enter the ZKPTR command. Enter the ZKPTR REPLACE command for each subsystem to initialize the keypoint pointer records. This must be done only once on the first processor to be IPLed with 32-way loosely coupled processor support.
See Coexistence, Migration and Fallback, and TPF Operations for more information about any restrictions and the use of these commands.
These commands must be entered on each multiple database function (MDBF) subsystem, but need to be entered on only one processor in the complex.
Notes:
Once migration to 32-way loosely coupled processor support is completed and there is no requirement to fall back to coexistence mode, do the following:
You can now add processors 9 - 32 to the TPF 4.1 loosely coupled processor complex.
Before You Begin |
---|
Once you have generated the ninth processor for the loosely couple complex, it is no longer possible to fall back to a TPF 4.1 system without 32-way loosely coupled processor support. |
If you must IPL a processor without 32-way loosely coupled processor support in the loosely coupled complex, do the following:
Notes: